Your question about Siemens S30810-Q2029-X100 PCG

The Hicom system operates synchronously. The switching network (SN), the periphery (line trunk units 1 - 6), and the service unit are supplied with the same clock pulse by the peripheral clock generator. The clock pulses are all derived from one quartz oscillator.

The Hicom system is equipped with a frequency control unit, which allows master-slave synchronization of the clock generator to a reference frequency derived from an external source. This reference frequency is transmitted from a node of higher or equal hierarchy level (e.g. public network).

The clock generator can also be used in isolation as a central control oscillator. This can operate in an analog environment, or can supply the reference frequency for a regional synchronous digital star network (e.g. PABX).

In synchronous operation, a frequency control unit is used to derive a central clock frequency of 2.048 MHz from the supplied reference frequency. At best, the frequency control unit attains the frequency stability of the reference frequency.

Frequencies between 75 Hz and 1048 kHz can be used as the reference frequency for synchronization of the clock generator.

The reference clock can only come from a digital trunk circuit.

The trunk circuit selected is set (via the DCL board), and then supplies the reference clock to the associated line trunk unit control (LTUC). Along with the clock pulse, the trunk circuit also supplies a control signal to the associated LTUC, which then switches through the reference clock.

The clock lines in an LTU are routed to one point. Likewise, the reference outputs of all LTU shelves are interconnected and lead to the PCG. For this reason, it is important to ensure that only one trunk circuit is supplying the reference clock.

The PCG supplies the clocks CKA, CKB, CKC, and FMB (frame mark bit).

CKA = 2.048 MHz (PCM clock) CKB = 4.096 MHz (PCM clock) CKC = 8.192 MHz (PCM clock) FMB = 4.0 kHz (can be switched to 8.0 kHz)

The PCG has balanced outputs for the clocks CKA and FMB and the active signal ACT for each LTUC. In addition, the PCG also has unbalanced outputs for the clocks CKA, CKB, CKC, and FMB for the switching network and the service unit SU.

The clocks CKA and FMB are each routed by the PCG to the LTUCs in the LTU shelves. The clocks CKA and FMB are distributed within the LTUS by the LTUC.

All of the functions of the CCG are carried out under the supervision of the central processor. This makes it possible to carry out setting and interrogation via the signaling interface.

After a reset, an offline test is run and the hardware is initialized. A distinction is made here between cold and warm starts. A cold start is a startup after a power failure or interruption, while a warm start is a system restart when a valid setting value is stored in memory. In a cold start, the median value of the setting range is sent to the digital-analog converter, while in a warm start the previously calculated setting value is sent. This means that even in island operation the best possible setting is attained.

An on-line test is continuously run during operation.

If the PCG is inactive, the dot is lit. In the event of hardware faults on the PCG board the display will blink.

The front panel of the board contains a 7-segment display.