The DP4L (Data Processor 486 with LAN Node) is based on the DP486 board. As far as possible, the implementation is compatible to the DM3L module. Following features have been adapted:
The i486SX has access to an on-board processor bus. The local memory and the LAN controller together with their I/O ports as well as an on-board peripheral bus connect directly to this processor bus. The peripheral bus connects the EPROM and FLASH memory, the peripheral components (timer, interrupt controller, configuration ports), the I/O subsystem (V.24 controller, human and partner IF) and the system bus to the processor bus.
One asynchronous V.24 interface provides access for monitoring. Logic interfacing to an optional partner DP4L is implemented. The system bus interface allows addressing of off-board I/O ports and memory. The LAN node forms a high speed interface to other modules.
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